| Question | Topic | Source Company | Action |
|---|---|---|---|
| What is hashing and mention some hash types you know | Data Structures | Humming Wave | View Context |
| Some questions on Trees | Data Structures | Humming Wave | View Context |
| Write verilog code for OR gate using different modeling behaviour. | Digital Logic Design | Texas Instruments | View Context |
| Create a or gate using half adders and simply the equation to a + b | Digital Logic Design | Texas Instruments | View Context |
| Write truth table for even and odd parity for 3 input variables and draw the logic gate structure for the same? | Digital Logic Design | Texas Instruments | View Context |
| Follow to the fourth. Build a design where a logic high is given when odd number of ones enters in a bit stream? | Digital Logic Design | Texas Instruments | View Context |
| Detect the pattern 101 in the sequence of incoming bit. | Digital Logic Design | Texas Instruments | View Context |
| If capaticor are charged to some initail vlaue then what will be the charge on each capitore after certain time | Analog Electronics | Texas Instruments | View Context |
| How to make a D flip-flop using mux | Digital Electronics | Texas Instruments | View Context |
| Draw Xor gate with using Nor gate only | Digital Logic Design | Texas Instruments | View Context |
| How to make a 27* 1 decoder using 3* 1 decder | Digital Logic Design | Texas Instruments | View Context |
| How would you design a URL shortening service like TinyURL? | System Design | View Context | |
| Given a binary tree, find the lowest common ancestor (LCA) of two given nodes in the tree. | Trees | View Context | |
| Explain the difference between a process and a thread. | Operating Systems | Microsoft | View Context |
| Implement a LRU Cache. | Data Structures | Amazon | View Context |
What is hashing and mention some hash types you know
Data Structures•Humming Wave
View ContextSome questions on Trees
Data Structures•Humming Wave
View ContextWrite verilog code for OR gate using different modeling behaviour.
Digital Logic Design•Texas Instruments
View ContextCreate a or gate using half adders and simply the equation to a + b
Digital Logic Design•Texas Instruments
View ContextWrite truth table for even and odd parity for 3 input variables and draw the logic gate structure for the same?
Digital Logic Design•Texas Instruments
View ContextFollow to the fourth. Build a design where a logic high is given when odd number of ones enters in a bit stream?
Digital Logic Design•Texas Instruments
View ContextDetect the pattern 101 in the sequence of incoming bit.
Digital Logic Design•Texas Instruments
View ContextIf capaticor are charged to some initail vlaue then what will be the charge on each capitore after certain time
Analog Electronics•Texas Instruments
View ContextHow to make a D flip-flop using mux
Digital Electronics•Texas Instruments
View ContextDraw Xor gate with using Nor gate only
Digital Logic Design•Texas Instruments
View ContextHow to make a 27* 1 decoder using 3* 1 decder
Digital Logic Design•Texas Instruments
View ContextHow would you design a URL shortening service like TinyURL?
System Design•Google
View ContextGiven a binary tree, find the lowest common ancestor (LCA) of two given nodes in the tree.
Trees•Google
View ContextExplain the difference between a process and a thread.
Operating Systems•Microsoft
View ContextImplement a LRU Cache.
Data Structures•Amazon
View Context